The present invention relates to a semiconductor integrated circuit device and, more specifically, to a structure of an active area, a shallow trench isolation, and a conductor formed on the active area and the shallow trench isolation via a glue layer.
FIG. 1 is a cross-sectional view showing a prior art semiconductor integrated circuit device.
The device of FIG. 1 includes two adjacent active areas (AA) 104 between which a shallow trench isolation (STI) 103 is interposed. An N+-type semiconductor region 105 is formed in one of the active areas 104, and a P+-type semiconductor region 106 is formed in the other active area 104. An opening 113 is formed in a first interlayer insulation film 112. The shallow trench isolation 103, N+-type semiconductor region 105 and P+-type semiconductor region 106 are exposed to the bottom of the opening 113. A glue layer 114 is formed in the opening 113. The opening 113 is filled with a conductor 115 which is electrically connected to the regions 105 and 106 through the glue layer 114. The conductor 115 connects the regions 105 and 106 above the shallow trench isolation 103.
In the structure of the prior art device shown in FIG. 1, the glue layer 114 is brought into direct contact with both the N+- and P+-type semiconductor regions 105 and 106 in the opening 113. If, therefore, a defect 200 is caused in the active area 104 so as to extend from the region 105 and reach a substrate 101 through a PN junction, a conductor constituting the glue layer 114, such as titanium (Ti), is diffused along the defect 200 by a heating step of a manufacturing process, and a Ti-silicide layer will be formed through the PN junction. As a result, a leak (junction leak) is increased remarkably in the PN junction.
The increase in junction leak increases power consumption and causes malfunction, which lowers the reliability of the device and decreases the manufacturing yield thereof.